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Early-Bird submissions

We had one early-bird submission, which was accepted for publication at OSDA 2024. We are very much looking forward to your poster presentation at the workshop! Congratulations!

Authors Title
Vojtech Mrazek An Open-Source Automated Design Space Exploration Framework for Approximate Accelerators in FPGAs and ASICs

2nd Early-Bird submissions

Authors Title
Ajeetha Kumari Venkatesan, Anirudh Pradyumnan Srinivasan, Deepa Palaniappan Adding configurability to PySlint using TOML
Joaguin Matres GDSfactory: Build better hardware with better software
Samit Basu RustHDL - Rust as a Hardware Description Language
Louis Ledoux and Marc Casas The Grafted Superset Approach: Bridging Python to Silicon with Asynchronous Compilation and Beyond

Regular submissions

Authors Title
Lucas Klemmer and Daniel Grosse WSVA: A SystemVerilog Assertion to WAL Compiler
Mohammadamin Hajikhodaverdian, Zihao Yuan, Sherief Reda and Ayse Coskun PACT: A SPICE-Based Parallel Compact Thermal Simulator for Fast Analysis
Jakob Ratschenberger and Harald Pretl RALF: A Reinforcement Learning Assisted Automated Analog Layout Design Flow
Davide Cieri Hog (HDL on git): a tool to manage HDL code on a git repository
Ayaka Yorihiro, Griffin Berlstein, Kevin Laeufer and Adrian Sampson A FIRRTL Backend for the Calyx High-Level Accelerator Compilation Infrastructure
Guillem López-Paradís, Brian Li, Adrià Armejach, Stefan Wallentowitz, Miquel Moretó and Jonathan Balkind Using Supercomputers to Parallelize RTL Simulations
Manfred Schlägl, Christoph Hazott and Daniel Große RISC-V VP++: Next Generation Open-Source Virtual Prototype
Marc Solé i Bonet, Aridane Alvarez Suarez and Leonidas Kosmidis The METASAT Hardware Platform v1.1: Identifying the Challenges for its RISC-V CPU and GPU Update
Theodor Lindberg, Mikael Henriksson and Oscar Gustafsson APyTypes: Flexible Fixed- and Floating-Point Types for Word Length Simulation in Python